Skip to content
Chipchain
  • Markets
  • Newsroom
Search

Language

  • English
  • 简体中文
  • 繁體中文
  • 日本語
  • 한국어
  • Deutsch
  • Français
  • Español
  • Português
  • Italiano
  • Nederlands
  • Svenska
  • Norsk
  • Dansk
  • Suomi
  • Русский
  • Türkçe
  • Tiếng Việt
  • ไทย
  • العربية
  • עברית
Contact sales

Products

Silicon and systems for AI at the edge

Overview
  • Full-custom AI chipsFull-custom design for AI inference, training, large model, edge and vision chips
  • Custom AI siliconApplication-specific AI accelerators, from architecture to tape-out
  • Edge AI systemsCompute modules and systems built around AI silicon
Choose how we work togetherHand over as much of the flow as you need, from a specification to a production transfer.Compare engagement models

Design Services

From specification to production silicon

Overview
  • Full-custom designTransistor-level design for critical datapath blocks
  • Library characterizationStandard cell library characterization and re-characterization, including ultra-low voltage
  • Hand-crafted netlistsCustom gate-level netlists, designed with custom cells and hand placement
  • Custom clock treesClock distribution designed for pipelines and regular arrays
  • Manual place and routeHand placement, custom clock trees and abutment
  • Standard cell librariesCells tuned for power, performance and area
  • ASIC designArchitecture, RTL, verification, DFT and physical design
  • Production and supply chainWafers, test, assembly and logistics under one plan
  • Engagement modelsSpec-in, netlist-in, GDS-in or production transfer
Start a projectShare your specification and schedule, and we will reply.Request a quote

Technology

Process nodes, methodology and the terms behind them

Overview
  • Full-custom methodologyWhen transistor-level design is worth it, and the nine stages of the method
  • Process nodesThe FinFET nodes we have designed on
  • Design methodologyHow a design moves from specification to silicon
  • GlossaryPlain-language definitions of chip-design terms
New to chip design?Our glossary explains the terms in plain language.Open the glossary

Company

Who we are and how we work

Overview
  • HistoryMilestones since the company was founded
  • LeadershipHow Chipchain is led
  • LocationsWhere to find us
  • TrustQuality, sourcing and product security
  • CareersJoin the team
  • ContactSales, partnerships and press
NewsroomAnnouncements and milestones from Chipchain.Read the news
Chipchain
Products
  • Overview
  • Full-custom AI chips
  • Custom AI silicon
  • Edge AI systems
Design Services
  • Overview
  • Full-custom design
  • Library characterization
  • Hand-crafted netlists
  • Custom clock trees
  • Manual place and route
  • Standard cell libraries
  • ASIC design
  • Production and supply chain
  • Engagement models
Markets
Technology
  • Overview
  • Full-custom methodology
  • Process nodes
  • Design methodology
  • Glossary
Newsroom
Company
  • Overview
  • History
  • Leadership
  • Locations
  • Trust
  • Careers
  • Contact
Search
Change language: English
  • English
  • 简体中文
  • 繁體中文
  • 日本語
  • 한국어
  • Deutsch
  • Français
  • Español
  • Português
  • Italiano
  • Nederlands
  • Svenska
  • Norsk
  • Dansk
  • Suomi
  • Русский
  • Türkçe
  • Tiếng Việt
  • ไทย
  • العربية
  • עברית
Contact sales
Chipchain

Chipchain Technologies Co., Ltd.芯行科技有限公司www.chipchain.com

Accessibility statement

Last updated November 3, 2026

This statement sets out what we aim for on www.chipchain.com and www.chipchain.net, what we test, and how to tell us about a problem.

On this page

  1. Our aim
  2. How the pages are built
  3. What we test, and how
  4. Good to know
  5. Tell us about a problem
  6. About this statement

Our aim

The sites aim to meet the Web Content Accessibility Guidelines (WCAG) 2.2 at level AA.

This is an aim, not a statement of conformance.

How the pages are built

  • Pages work with a keyboard, with a link to skip to the content and a visible focus ring.
  • Pages follow your reduced-motion setting. With it on, the film on the home page stays paused.
  • Pages declare their language and reading direction, including right-to-left for Arabic and Hebrew.
  • The layout adapts to narrow screens without sideways scrolling, and it copes with larger text spacing and forced colours.
  • Form fields have visible labels, required fields say so in words, and errors are given in words beside the field.

What we test, and how

These checks run on production builds of the sites, in the Chromium browser:

  • automated checks with axe-core against WCAG 2.2 levels A and AA, on every page template in every language;
  • Lighthouse accessibility audits on a sample of pages;
  • scripted checks of keyboard use, including the menus, the language picker and the request form, and that every stop shows a focus ring;
  • scripted checks of touch use, reduced motion, text spacing and forced colours, and of overflow at narrow widths.

Good to know

  • Automated tools find part of the problems a person may meet, so your feedback helps.
  • The logos and artwork in the press kit, and the ZIP file that holds them, are design files.
  • The film on the home page has no sound and carries no information that the page's text does not give.
  • Site search needs JavaScript.
  • Legal pages are published in English, Simplified Chinese and Traditional Chinese.

Tell us about a problem

If something on the sites is hard to use, write to info@chipchain.com. Please give the page address, what you were trying to do, and the browser or assistive technology you use. If you need content in another form, say which.

About this statement

This statement describes the sites as they were on the date at the top of this page, and we may update it. It is a description, not a promise that every page meets the guidelines at all times.

Chipchain

Let's talk about your next chip.

Tell us what you are building and when you need it.

Contact sales

Products

  • Products
  • Full-custom AI chips
  • Custom AI silicon
  • Edge AI systems

Design Services

  • Design services
  • Full-custom design
  • Library characterization
  • Hand-crafted netlists
  • Custom clock trees
  • Manual place and route
  • ASIC design
  • Production and supply chain
  • Engagement models
  • Contact sales

Technology

  • Technology
  • Full-custom methodology
  • Process nodes
  • Design methodology
  • Glossary
  • Markets

Newsroom

  • Newsroom
  • Press kit

Company

  • Company
  • History
  • Leadership
  • Locations
  • Trust
  • Careers
  • Contact

Language

  • English
  • 简体中文
  • 繁體中文
  • 日本語
  • 한국어
  • Deutsch
  • Français
  • Español
  • Português
  • Italiano
  • Nederlands
  • Svenska
  • Norsk
  • Dansk
  • Suomi
  • Русский
  • Türkçe
  • Tiếng Việt
  • ไทย
  • العربية
  • עברית

© 2018–2026 Chipchain Technologies Co., Ltd. All rights reserved.

  • Privacy notice
  • Terms of use
  • Cookies
  • Accessibility
  • Legal notice